Notre partenariat avec Jasper, permet à EASii-IC de fournir une offre complète outils+services en vérification formelle :
- Prise en charge de projet de vérification formelle utilisant JasperGold
- Développement de librairies d’assertions (SVA, PSL) pour les moteurs formels
- Vérification exhaustive des fonctionnalités critiques en via les technologies formelle de JasperGold
- Mise en place et intégration des méthodologies de vérification formelle au sein des projets clients
- JasperGold integration in your current verification flow
- Assertions library / formal proof kit development (SVA, PSL)
About Jasper
Jasper Design Automation's mission is to make full formal IC verification a competitive advantage for its customers. Jasper's formal verification solutions are used by logic designers, verification engineers and silicon bring-up teams to design, explore and debug RTL, to ensure correctness of block-level functionality and for rapid post-silicon validation and debug. JasperGold® Verification System delivers complete deep formal systematic verification, ensuring correctness of critical design features without any testbench development.
JasperGold®
- Advanced formal property verification
- Solves top project challenges across a spectrum of SoC applications
ActiveDesign™
- Databases and analysis system for design and reuse
- Accelerates design development and leverages designs and IP
JasperCore™
- Formal verification solution for intelligent resource management
- Formal verification solution for intelligent resource management
